Automatic test equipment or ATE is used to test semiconductor or other type devices at various stages of manufacture. An ATE tester generates signals, supplies the signals to selected pins of a device under test or DUT, and monitors the responses to these signals to evaluate the fitness of the DUT. These signals include DC signals, and time varying signals such as AC, pulsed, or other periodic signals.
To provide these signals with precision to each of the selected pins, a single central resource, such as an oscillator, pulse generator, sine wave generator, etc., is used. The signal provided by such central resource is switched along a selected channel to a pin under test.
In the past, this was accomplished using a relay matrix configured in a binary tree structure as shown in FIG. 1. FIG. 1 illustrates two state form-C relays, capable of providing signals to one of two outputs. In the binary tree configuration of FIG. 3, a form C-relay R1 has an input connected to the central resource and two outputs each connected to inputs of two form-C relays, R21 and R22. R21 and R22 are in turn are each connected in similar fashion to relays R31-R34 of layer R3. In the illustration of FIG. 1, this pattern is repeated for several layers R1-R7 of relays to provide selectable signal channels to 128 output pins.
Although this configuration provides several advantages, there are several drawbacks associated with the use of relays as discussed in U.S. Pat. No. 6,331,783 by Steven Hauptman, filed on Oct. 19, 1999, entitled CIRCUIT AND METHOD FOR IMPROVED TEST AND CALIBRATION IN AUTOMATED TEST EQUIPMENT, issued on Dec. 18, 2001, herein incorporated by reference in its entirety.
A significant drawback is that relays is that polymer can build up on the surface of the relay contacts. Contacts are susceptible to polymer build-up when switched dry rather than under an applied current or voltage. Such polymer build-up increases contact resistance. Moreover, the resistance caused by polymer build-up varies each time the contacts are closed. This is particularly true in relays designed for high bandwidth applications. In such applications, relays having small contacts to provide lower capacitance along the high frequency transmission line also have a reduced spring force, which facilitates resistance variations in polymerized contacts. In testers designed to test devices 125 Mhz-500 Mhz or greater, relays normally having only a fraction of an ohm resistance, can develop several ohms of resistance. This results in each closure of the relay leading to a different resistance value, which affects measurement precision and, consequently, the reliability of the tester. As such, relays contribute to tester down time, slowing production and reducing product margins. To compete in semiconductor and other electronic devices markets, manufacturers require more reliable test equipment.
Another drawback of that the binary relay tree configuration is that it requires a large number of relatively large sized relays. To go from one resource to N output pins requires Nxe2x88x921 relays. With 128 pins, seven relays are present in the transmission channel. Due to their size, the relays must be spread across the circuit board resulting in location of the relays along the transmission channel rather than close to the ends. This causes a skin effect problem resulting in signal transitions to be less defined. Such a degraded signal can cause inaccuracy during signal calibration and test measurements.
What is needed is a reliable circuit for accurate testing in a multi-channel tester.
In at least one embodiment, a circuit for a multi-channel tester having a central resource, a plurality of outputs, and a switching matrix coupling the central resource to the plurality of outputs via a plurality of selectable channels. Each of the selectable channels having PIN diodes coupled in a half-bridge configuration. A first, a second, and a third biasing source are provided for forward biasing the PIN diodes. The first and second biasing sources are coupled to a central resource coupled end and an output coupled end of the half-bridge, respectively. The third biasing source is coupled to a common node. The first and second biasing sources are constructed to provide substantially balanced outputs and so that the sum of the outputs of the first and second biasing sources is substantially balanced with respect to the output of the third bias source.
In one embodiment, a the plurality of selectable channels comprises the same first biasing source. Further, in some embodiments, each of the plurality of channels comprises a different second biasing source. In some embodiments, pin electronics drivers are used as second biasing sources. In further embodiments, a single third biasing source is coupled to each of the common nodes of the plurality of selectable channels via one of a plurality of switches.
It is possible in some embodiments, to locate the PIN diodes near the central resource end of the channel and near the output pin end of the channel allowing cleaner more accurate voltage/timing measurements.